1. Field of the Invention
The present invention relates to a technique of obtaining a wiring contact to an electrode or wiring line that is made only or mainly of aluminum.
2. Description of the Related Art
A thin-film transistor is known which is formed by a manufacturing process as shown in FIGS. 5A to 5D. This type of thin-film transistor, which is formed on a glass substrate, has a feature of a small off-current, which is very important when the thin-film transistor is used in an active matrix liquid crystal display device or other thin-film integrated circuits.
In the thin-film transistor of FIGS. 5A to 5D, the off-current characteristic is improved by forming electrical buffer regions called offset gate regions between the channel forming region and the source and drain regions. The configuration of FIGS. 5A to 5D is disclosed in Japanese Unexamined Patent Publication No. Hei. 4-360580, for instance.
The manufacturing process of a thin-film transistor shown in FIGS. 5A to 5D will be described below. First, a glass substrate 201 is prepared, and a silicon oxide film 202 is formed on the surface of the glass substrate 201 by sputtering or plasma CVD. The silicon oxide film 202 is an undercoat film to prevent diffusion of impurities etc. from the glass substrate 201. An amorphous silicon film is formed thereon by plasma CVD or low-pressure thermal CVD.
When necessary, the amorphous silicon film is crystallized into a crystalline silicon film by a heat treatment or laser light illumination. If it is permitted that a resulting thin-film transistor exhibits low-level performance, the amorphous silicon film may be used as it is.
Next, the amorphous silicon film is patterned into an active layer 203 of an intended thin-film transistor. Then, a silicon oxide film 204 to serve as a gate insulating film is formed by plasma CVD or sputtering. Further, a gate electrode 205 is formed by forming an aluminum film and then patterning it. The gate electrode 205 is called a first-layer wiring. (FIG. 5A)
Next, an anodic oxide film 206 is formed around the gate electrode 205 by performing anodization in an electrolyte with the gate electrode 205 used as the anode. The technique of forming the anodic oxide film 206 is important in the thin-film transistor manufacturing process of FIGS. 5A to 5D. (FIG. 5B)
Thereafter, to form source and drain regions, impurity ions (P (phosphorus) ions in this embodiment) are implanted by ion implantation or plasma doping as shown in FIG. 5C.
In this step, the gate electrode 205 and the anodic oxide film 206 surrounding it act as a mask, and hence impurity ions are not implanted into the region thereunder. On the other hand, impurity ions are implanted into regions 207 and 210, which become a source region and a drain region, respectively. Regions 208 where impurity ions are not implanted become offset gate regions. Further, a region 209 becomes a channel forming region.
Since the impurity ion implantation step of FIG. 5C is performed in a self-aligned manner, no cumbersome operation such as mask registration is not needed. For this reason, this manufacturing process is much superior in productivity and can provide very small variations in characteristics among devices produced.
After the ion implantation step of FIG. 5C, a silicon oxide film 211 is formed as an interlayer insulating film. Further, contact holes are formed, and then a source electrode 212 and a drain electrode 213 are formed. At the same time, a lead-out electrode 214 extending from the gate electrode 205 is formed. (FIG. 5D)
Although FIG. 5D is drawn as if the source and drain electrodes 212 and 213 and the lead-out electrode 214 extending from the gate electrode 205 were located in the same vertical cross-section, actually the lead-out electrode 214 exists on the viewer--s side or the opposite side in FIG. 5D. The source and drain electrodes 212 and 213 and the lead-out electrode 214 are called a second-layer wiring.
The manufacturing process of FIGS. 5A to 5D is superior in the step of forming the offset gate regions and a resulting thin-film transistor has superior performance. In manufacture of a large-area active matrix liquid crystal display device and other large-scale integrated circuits, the use of aluminum in forming the gate electrode is very effective in reducing the wiring resistance.
Further, the configuration of FIGS. 5A to 5D is also advantageous in that since the gate electrode and the gate wiring line are covered with the dense anodic oxide film having a high breakdown voltage, great improvement is attained in terms of the leak to and the interaction with various wiring lines formed on the interlayer insulating film.
Although the thin-film manufacturing process of FIG. 5A to 5D is very advantageous as described above, there is a serious problem in the step of FIG. 5D. In the step of FIG. 5D, the contact holes for the source and drain electrodes 212 and 213 as well as the contact hole for the lead-out electrode 214 of the gate electrode 205 should be formed.
The contact holes for the source and drain electrodes 212 and 213 can be formed relatively easily through wet etching with a hydrofluoric acid type etchant such as a buffered hydrofluoric acid (BHF) because the films to be etched are the silicon oxide films 211 and 204.
Since the etching rate of the buffered hydrofluoric acid with respect to silicon is much smaller than that with respect to silicon oxide, the etching can be stopped at a time point when the etching has reached the active layer 203. That is, the active layer 203 can be used as an etching stopper.
In the case of forming the contact hole for the lead-out electrode 214, the silicon oxide film 211 and the aluminum oxide film 206 (mainly made of Al.sub.2 O.sub.3) that was formed by anodization need to be etched. This etching is performed also by using a buffered hydrofluoric acid.
FIGS. 6A and 6B show how the oxide film 206 is etched with a hydrofluoric acid type etchant. First, as shown in FIG. 6A, the silicon oxide film 211 is etched with a hydrofluoric acid type etchant such as a buffered hydrofluoric acid. Then, the aluminum oxide film 206 is etched.
However, when the aluminum gate electrode 205 is exposed, a very thin oxide layer 302 is formed on its surface. The oxide layer 302 will prevent formation of a proper electrical contact in a later step.
Since the very thin oxide layer 302 is formed very easily due to exposure to the air, it is very difficult to prevent its formation.
In summary, the use of the aluminum gate electrode has the following advantages:
(1) A device suitable for high-speed operation can be formed because the electrode resistance can be reduced. In particular, where a gate wiring line is so formed as to extend from the gate electrode, its wiring resistance can be reduced.
(2) Offset gate regions can be formed in a self-aligned manner by an ion implantation process by using, as a mask, an aluminum oxide layer formed around the gate electrode.
(3) The possibility of occurrence of short-circuiting and crosstalk between upper and lower wiring lines can be reduced, contributing to increasing the reliability.
On the other hand, there is a problem that in forming a contact hole to reach the aluminum gate electrode, an oxide layer that is formed on the aluminum surface prevents formation of a proper contact. In particular, this problem is more serious in a case where a contact is to be taken between aluminum films.